1. Field of the Invention
The present invention relates to a control circuit for a 2-coordinate memory wherein an input signal is propagated through a memory row in order to derive a control signal for read or write operations.
2. Description of the Prior Art
Such a control circuit is already known in the art, e.g. from the article entitled "An 11-ns 8K.times.18 CMOS Static RAM with 0.5-um Devices" by D. T. WONG et al, published in the IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 23, NO. 5, October 1988 pages 1095 to 1103. Therein, the input signal is applied to one end of a reference row or word-line of the memory and the control signal is collected at the other end of this reference word-line. Since the reference word-line closely tracks the propagation time of a signal through an actual row or word-line of the memory, the control signal is used to restore a word-line selection signal within the active part of a read or write operation. This system has the advantage of automatically adapting the duration of a read or write operation to the length of the rows of the memory. However, to this end, the memory must be provided with a reference word-line whereby the propagation time of a signal through an actual word-line is simulated and the input signal must be applied to this reference word-line simultaneously with the application of a word-line selection signal to any word-line of the memory.